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 74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
March 1995 Revised April 1999
74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
General Description
The LCX541 is an octal buffer/line driver designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers. The LCX541 is a non inverting option of the LCX540. This device is similar in function to the LCX244 while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes this device especially useful as an output port for microprocessors, allowing ease of layout and greater PC board density. The LCX541 is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX541 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
Features
s 5V tolerant input and outputs s 2.3V-3.6V VCC specifications provided s 6.5 ns tPD max (VCC = 3.3V), 10 A ICC max s Power-down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s 24 mA output drive (VCC = 3.0V) s Implements patented noise/ EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number 74LCX541WM 74LCX541SJ 74LCX541MSA 74LCX541MTC Package Number M20B M20D MSA20 MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
(c) 1999 Fairchild Semiconductor Corporation
DS012404.prf
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74LCX541
Pin Descriptions
Pin Names OE1, OE2 I0, I7 O0, O7 Description 3-STATE Output Enable Inputs Inputs Outputs
Truth Table
Inputs OE1 L H X L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
Outputs I H X X L On H Z Z L
OE2 L X H L
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74LCX541
Absolute Maximum Ratings(Note 2)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Parameter Value Conditions Units V V Output in 3-STATE Output in HIGH or LOW State (Note 3) VI < GND VO < GND VO > VCC V mA mA mA mA mA
-0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 -50 -50 +50 50 100 100 -65 to +150 (Note 4)
C
Recommended Operating Conditions
Symbol VCC VI VO IOH/IOL Supply Voltage Input Voltage Output Voltage Output Current Parameter
Min Operating Data Retention HIGH or LOW State 3-STATE VCC = 3.0V - 3.6V VCC = 2.7V - 3.0V VCC = 2.3V - 2.7V 2.0 1.5 0 0 0
Max 3.6 3.6 5.5 VCC 5.5
Units V V V
24 12 8 -40
0 85 10
mA
TA
Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V-2.0V, VCC = 3.0V
C
ns/V
t/V
Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 3: IO Absolute Maximum Rating must be observed. Note 4: Unused inputs or I/O's must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH VIL VOH
Parameter
HIGH Level Input Voltage LOW Level Input Voltage
Conditions
VCC (V) 2.3 - 2.7 2.7 - 3.6 2.3 - 2.7 2.7 - 3.6 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 0 2.3 - 3.6 2.3 - 3.6 2.3 - 3.6
TA = -40C to +85C Min 1.7 2.0 0.7 0.8 VCC - 0.2 1.8 2.2 2.4 2.2 0.2 0.6 0.4 0.4 0.55 5.0 10 10 10 500 Max
Units
V V
HIGH Level Output Voltage IOH = -100A IOH = -8 mA IOH = -12 mA IOH = -18 mA IOH = -24 mA
V
VOL
LOW Level Output Voltage
IOL = 100A IOL = 8mA IOL = 12 mA IOL = 16 mA IOL = 24 mA
V
II IOFF ICC ICC
Input Leakage Current Quiescent Supply Current Increase in ICC per Input
0 V I 5.5V VI = VCC or GND 3.6V V I, VO 5.5V (Note 5) VIH = VCC = 0.6V
A A A A
Power-Off Leakage Current VI or VO = 5.5V
Note 5: Outputs disabled or 3-STATE only.
3
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74LCX541
AC Electrical Characteristics
TA = -40C to +85C, RL = 500 Symbol Parameter VCC = 3.3V 0.3V CL = 50 pF Min tPHL tPLH tPZL tPZH tPLZ tPHZ tOSHL tOSLH Output to Output Skew (Note 6) Output Disable Time Output Enable Time Propagation Delay 1.5 1.5 1.5 1.5 1.5 1.5 Max 6.5 6.5 8.5 8.5 7.5 7.5 1.0 1.0 VCC = 2.7V CL = 50 pF Min 1.5 1.5 1.5 1.5 1.5 1.5 Max 7.5 7.5 9.5 9.5 8.5 8.5 VCC = 2.5V 0.2V CL = 30 pF Min 1.5 1.5 1.5 1.5 1.5 1.5 Max 7.8 7.8 10.5 10.5 9.0 9.0 ns ns ns ns Units
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL Conditions CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V VCC (V) 3.3 2.5 3.3 2.5 TA = 25C Typical 0.8 0.6 -0.8 -0.6 Units V V
Capacitance
Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance Parameter Conditions VCC = Open, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC, f = 10 MHz Typical 7 8 25 Units pF pF pF
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74LCX541
AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test tPLH, tPHL tPZL, tPLZ tPZH,tPHZ Switch Open 6V at VCC = 3.3 0.3V VCC x 2 at VCC = 2.5 0.2V GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output Low Enable and Disable Times for Logic
Propagation Delay, Pulse Width and trec Waveforms
Setup Time, Hold TIme and Recovery TIme for Logic
3-STATE Output High Enable and Disable Times for Logic FIGURE 2. Waveforms (Input Pulse Characteristics; f=1MHz, tr=tf=3ns) Symbol Vmi Vmo Vx Vy VCC 3.3V 0.3V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 2.7V 1.5V 1.5V VOL + 0.3V VOH - 0.3V
trise and tfall
2.5V 0.2V VCC/2 VCC/2 VOL + 0.15V VOH - 0.15V
5
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74LCX541
Schematic Diagram Generic for LCX Family
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74LCX541
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B
20-Lead Molded Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 7 www.fairchildsemi.com
74LCX541
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20
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74LCX541 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.


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